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402 lines
14 KiB
402 lines
14 KiB
/* This file is a part of MIR project.
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Copyright (C) 2018-2020 Vladimir Makarov <vmakarov.gcc@gmail.com>.
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x86_64 ABI target specific code.
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*/
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/* See https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-1.0.pdf. We use MIR_T_UNDEF for
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MEMORY. */
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enum add_arg_class { NO_CLASS = MIR_T_BOUND + 1, X87UP_CLASS };
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#ifndef _WIN32
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#define MAX_QWORDS 2
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#else
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#define MAX_QWORDS 1
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#endif
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static MIR_type_t get_result_type (MIR_type_t arg_type1, MIR_type_t arg_type2) {
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if (arg_type1 == arg_type2) return arg_type1;
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if ((enum add_arg_class) arg_type1 == NO_CLASS) return arg_type2;
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if ((enum add_arg_class) arg_type2 == NO_CLASS) return arg_type1;
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if (arg_type1 == MIR_T_UNDEF || arg_type2 == MIR_T_UNDEF) return MIR_T_UNDEF;
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if (arg_type1 == MIR_T_I64 || arg_type1 == MIR_T_I32 || arg_type2 == MIR_T_I64
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|| arg_type2 == MIR_T_I32)
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return MIR_T_I64;
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if (arg_type1 == MIR_T_LD || arg_type2 == MIR_T_LD
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|| (enum add_arg_class) arg_type1 == X87UP_CLASS
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|| (enum add_arg_class) arg_type2 == X87UP_CLASS)
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return MIR_T_UNDEF;
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return MIR_T_D;
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}
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static int classify_arg (c2m_ctx_t c2m_ctx, struct type *type, MIR_type_t types[MAX_QWORDS],
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int bit_field_p) {
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size_t size = type_size (c2m_ctx, type);
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int i, n_el_qwords, n_qwords = (size + 7) / 8;
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MIR_type_t mir_type;
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if (type->mode == TM_STRUCT || type->mode == TM_UNION || type->mode == TM_ARR) {
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MIR_type_t subtypes[MAX_QWORDS];
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if (n_qwords > MAX_QWORDS) return 0; /* too big aggregate */
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#ifndef _WIN32
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for (i = 0; i < n_qwords; i++) types[i] = (MIR_type_t) NO_CLASS;
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switch (type->mode) {
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case TM_ARR: { /* Arrays are handled as small records. */
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n_el_qwords = classify_arg (c2m_ctx, type->u.arr_type->el_type, subtypes, FALSE);
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if (n_el_qwords == 0) return 0;
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/* make full types: */
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for (i = 0; i < n_qwords; i++)
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types[i] = get_result_type (types[i], subtypes[i % n_el_qwords]);
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break;
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}
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case TM_STRUCT:
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case TM_UNION:
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for (node_t el = NL_HEAD (NL_EL (type->u.tag_type->u.ops, 1)->u.ops); el != NULL;
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el = NL_NEXT (el))
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if (el->code == N_MEMBER) {
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decl_t decl = el->attr;
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int start_qword = decl->offset / 8;
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if (decl->bit_offset >= 0) {
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types[start_qword] = get_result_type (MIR_T_I64, types[start_qword]);
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} else {
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n_el_qwords
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= classify_arg (c2m_ctx, decl->decl_spec.type, subtypes, decl->bit_offset >= 0);
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if (n_el_qwords == 0) return 0;
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for (i = 0; i < n_el_qwords && (i + start_qword) < n_qwords; i++)
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types[i + start_qword] = get_result_type (subtypes[i], types[i + start_qword]);
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}
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}
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break;
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default: assert (FALSE);
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}
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if (n_qwords > 2) return 0; /* as we don't have vector values (see SSEUP_CLASS) */
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for (i = 0; i < n_qwords; i++) {
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if (types[i] == MIR_T_UNDEF) return 0; /* pass in memory if a word class is memory. */
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if ((enum add_arg_class) types[i] == X87UP_CLASS && (i == 0 || types[i - 1] != MIR_T_LD))
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return 0;
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}
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return n_qwords;
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#else
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types[0] = MIR_T_I64;
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return 1;
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#endif
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}
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assert (scalar_type_p (type));
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switch (mir_type = get_mir_type (c2m_ctx, type)) {
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case MIR_T_F:
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case MIR_T_D: types[0] = MIR_T_D; return 1;
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case MIR_T_LD:
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types[0] = MIR_T_LD;
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types[1] = (MIR_type_t) X87UP_CLASS;
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return 2;
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default: types[0] = MIR_T_I64; return 1;
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}
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}
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typedef struct target_arg_info {
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int n_iregs, n_fregs;
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} target_arg_info_t;
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static void target_init_arg_vars (c2m_ctx_t c2m_ctx, target_arg_info_t *arg_info) {
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arg_info->n_iregs = arg_info->n_fregs = 0;
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}
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static void update_last_qword_type (c2m_ctx_t c2m_ctx, struct type *type,
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MIR_type_t qword_types[MAX_QWORDS], int n) {
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size_t last_size, size = type_size (c2m_ctx, type);
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MIR_type_t mir_type;
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assert (n != 0);
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if ((last_size = size % 8) == 0 || n > 1) return;
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mir_type = qword_types[n - 1];
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if (last_size <= 4 && mir_type == MIR_T_D) qword_types[n - 1] = MIR_T_F;
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if (last_size <= 4 && mir_type == MIR_T_I64)
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qword_types[n - 1] = last_size <= 1 ? MIR_T_I8 : last_size <= 2 ? MIR_T_I16 : MIR_T_I32;
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}
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static int process_ret_type (c2m_ctx_t c2m_ctx, struct type *ret_type,
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MIR_type_t qword_types[MAX_QWORDS]) {
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MIR_type_t type;
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int n, n_iregs, n_fregs, n_stregs, curr;
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int n_qwords = classify_arg (c2m_ctx, ret_type, qword_types, FALSE);
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if (ret_type->mode != TM_STRUCT && ret_type->mode != TM_UNION) return 0;
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if (n_qwords != 0) {
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update_last_qword_type (c2m_ctx, ret_type, qword_types, n_qwords);
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n_iregs = n_fregs = n_stregs = curr = 0;
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for (n = 0; n < n_qwords; n++) { /* start from the last qword */
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type = qword_types[n];
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qword_types[curr++] = type;
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switch ((int) type) {
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case MIR_T_I8:
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case MIR_T_I16:
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case MIR_T_I32:
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case MIR_T_I64: n_iregs++; break;
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case MIR_T_F:
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case MIR_T_D: n_fregs++; break;
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case MIR_T_LD: n_stregs++; break;
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case X87UP_CLASS:
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n_qwords--;
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curr--;
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break;
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default: assert (FALSE);
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}
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}
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if (n_iregs > 2 || n_fregs > 2 || n_stregs > 1) n_qwords = 0;
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}
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return n_qwords;
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}
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static int target_return_by_addr_p (c2m_ctx_t c2m_ctx, struct type *ret_type) {
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MIR_type_t qword_types[MAX_QWORDS];
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int n_qwords;
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if (void_type_p (ret_type)) return FALSE;
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n_qwords = process_ret_type (c2m_ctx, ret_type, qword_types);
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return n_qwords == 0 && (ret_type->mode == TM_STRUCT || ret_type->mode == TM_UNION);
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}
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static void target_add_res_proto (c2m_ctx_t c2m_ctx, struct type *ret_type,
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target_arg_info_t *arg_info, VARR (MIR_type_t) * res_types,
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VARR (MIR_var_t) * arg_vars) {
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MIR_var_t var;
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MIR_type_t type;
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MIR_type_t qword_types[MAX_QWORDS];
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int n, n_qwords;
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if (void_type_p (ret_type)) return;
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n_qwords = process_ret_type (c2m_ctx, ret_type, qword_types);
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if (n_qwords != 0) {
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for (n = 0; n < n_qwords; n++)
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VARR_PUSH (MIR_type_t, res_types, promote_mir_int_type (qword_types[n]));
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} else if (ret_type->mode != TM_STRUCT && ret_type->mode != TM_UNION) {
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type = get_mir_type (c2m_ctx, ret_type);
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VARR_PUSH (MIR_type_t, res_types, type);
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} else { /* return by reference */
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var.name = RET_ADDR_NAME;
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var.type = MIR_T_RBLK;
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var.size = type_size (c2m_ctx, ret_type);
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VARR_PUSH (MIR_var_t, arg_vars, var);
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arg_info->n_iregs++;
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}
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}
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static int target_add_call_res_op (c2m_ctx_t c2m_ctx, struct type *ret_type,
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target_arg_info_t *arg_info, size_t call_arg_area_offset) {
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gen_ctx_t gen_ctx = c2m_ctx->gen_ctx;
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MIR_context_t ctx = c2m_ctx->ctx;
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MIR_type_t type;
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MIR_type_t qword_types[MAX_QWORDS];
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op_t temp;
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int i, n_qwords;
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if (void_type_p (ret_type)) return -1;
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n_qwords = process_ret_type (c2m_ctx, ret_type, qword_types);
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if (n_qwords != 0) {
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for (i = 0; i < n_qwords; i++) {
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temp = get_new_temp (c2m_ctx, promote_mir_int_type (qword_types[i]));
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VARR_PUSH (MIR_op_t, call_ops, temp.mir_op);
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}
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return n_qwords;
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} else if (ret_type->mode == TM_STRUCT || ret_type->mode == TM_UNION) { /* return by reference */
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arg_info->n_iregs++;
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temp = get_new_temp (c2m_ctx, MIR_T_I64);
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emit3 (c2m_ctx, MIR_ADD, temp.mir_op,
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MIR_new_reg_op (ctx, MIR_reg (ctx, FP_NAME, curr_func->u.func)),
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MIR_new_int_op (ctx, call_arg_area_offset));
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temp.mir_op
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= MIR_new_mem_op (ctx, MIR_T_RBLK, type_size (c2m_ctx, ret_type), temp.mir_op.u.reg, 0, 1);
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VARR_PUSH (MIR_op_t, call_ops, temp.mir_op);
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return 0;
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} else {
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type = get_mir_type (c2m_ctx, ret_type);
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type = promote_mir_int_type (type);
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temp = get_new_temp (c2m_ctx, type);
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VARR_PUSH (MIR_op_t, call_ops, temp.mir_op);
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return 1;
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}
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}
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static op_t target_gen_post_call_res_code (c2m_ctx_t c2m_ctx, struct type *ret_type, op_t res,
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MIR_insn_t call, size_t call_ops_start) {
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gen_ctx_t gen_ctx = c2m_ctx->gen_ctx;
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MIR_context_t ctx = c2m_ctx->ctx;
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MIR_type_t type;
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MIR_insn_t insn;
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MIR_type_t qword_types[MAX_QWORDS];
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int i, n_qwords;
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if (void_type_p (ret_type)) return res;
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n_qwords = process_ret_type (c2m_ctx, ret_type, qword_types);
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if (n_qwords != 0) {
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assert (res.mir_op.mode == MIR_OP_MEM);
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for (i = 0; i < n_qwords; i++) {
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type = qword_types[i];
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insn = MIR_new_insn (ctx, tp_mov (type),
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MIR_new_mem_op (ctx, type, res.mir_op.u.mem.disp + 8 * i,
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res.mir_op.u.mem.base, res.mir_op.u.mem.index,
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res.mir_op.u.mem.scale),
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VARR_GET (MIR_op_t, call_ops, i + call_ops_start + 2));
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MIR_append_insn (ctx, curr_func, insn);
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}
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}
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return res;
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}
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static void target_add_ret_ops (c2m_ctx_t c2m_ctx, struct type *ret_type, op_t res) {
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gen_ctx_t gen_ctx = c2m_ctx->gen_ctx;
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MIR_context_t ctx = c2m_ctx->ctx;
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MIR_type_t type;
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MIR_type_t qword_types[MAX_QWORDS];
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MIR_insn_t insn;
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MIR_reg_t ret_addr_reg;
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op_t temp, var;
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int i, size, n_qwords;
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if (void_type_p (ret_type)) return;
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n_qwords = process_ret_type (c2m_ctx, ret_type, qword_types);
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if (n_qwords != 0) {
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for (i = 0; i < n_qwords; i++) {
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type = qword_types[i];
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temp = get_new_temp (c2m_ctx, promote_mir_int_type (type));
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insn = MIR_new_insn (ctx, tp_mov (type), temp.mir_op,
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MIR_new_mem_op (ctx, type, res.mir_op.u.mem.disp + 8 * i,
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res.mir_op.u.mem.base, res.mir_op.u.mem.index,
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res.mir_op.u.mem.scale));
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MIR_append_insn (ctx, curr_func, insn);
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VARR_PUSH (MIR_op_t, ret_ops, temp.mir_op);
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}
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} else if (ret_type->mode != TM_STRUCT && ret_type->mode != TM_UNION) {
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VARR_PUSH (MIR_op_t, ret_ops, res.mir_op);
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} else {
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ret_addr_reg = MIR_reg (ctx, RET_ADDR_NAME, curr_func->u.func);
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var = new_op (NULL, MIR_new_mem_op (ctx, MIR_T_I8, 0, ret_addr_reg, 0, 1));
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size = type_size (c2m_ctx, ret_type);
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block_move (c2m_ctx, var, res, size);
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}
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}
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static int process_aggregate_arg (c2m_ctx_t c2m_ctx, struct type *arg_type,
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target_arg_info_t *arg_info, MIR_type_t qword_types[MAX_QWORDS]) {
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MIR_type_t type;
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int n, n_iregs, n_fregs, n_qwords = classify_arg (c2m_ctx, arg_type, qword_types, FALSE);
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if (n_qwords == 0) return 0;
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if (arg_type->mode != TM_STRUCT && arg_type->mode != TM_UNION) return 0;
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update_last_qword_type (c2m_ctx, arg_type, qword_types, n_qwords);
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n_iregs = n_fregs = 0;
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for (n = 0; n < n_qwords; n++) { /* start from the last qword */
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switch ((int) (type = qword_types[n])) {
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case MIR_T_I8:
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case MIR_T_I16:
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case MIR_T_I32:
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case MIR_T_I64: n_iregs++; break;
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case MIR_T_F:
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case MIR_T_D: n_fregs++; break;
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case X87UP_CLASS:
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case MIR_T_LD: return 0;
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default: assert (FALSE);
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}
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}
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if (arg_info->n_iregs + n_iregs > 6 || arg_info->n_fregs + n_fregs > 8) return 0;
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/* aggregate passed by value: update arg_info */
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arg_info->n_iregs += n_iregs;
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arg_info->n_fregs += n_fregs;
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return n_qwords;
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}
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static MIR_type_t get_blk_type (int n_qwords, MIR_type_t *qword_types) {
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int n, n_iregs = 0, n_fregs = 0;
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assert (n_qwords <= 2);
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if (n_qwords == 0) return MIR_T_BLK;
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for (n = 0; n < n_qwords; n++) { /* start from the last qword */
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switch ((int) qword_types[n]) {
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case MIR_T_I8:
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case MIR_T_I16:
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case MIR_T_I32:
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case MIR_T_I64: n_iregs++; break;
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case MIR_T_F:
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case MIR_T_D: n_fregs++; break;
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case X87UP_CLASS:
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case MIR_T_LD: return MIR_T_BLK;
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default: assert (FALSE);
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}
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}
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if (n_iregs == n_qwords) return MIR_T_BLK + 1;
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if (n_fregs == n_qwords) return MIR_T_BLK + 2;
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if (qword_types[0] == MIR_T_F || qword_types[0] == MIR_T_D) return MIR_T_BLK + 4;
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return MIR_T_BLK + 3;
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}
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static MIR_type_t target_get_blk_type (c2m_ctx_t c2m_ctx, struct type *arg_type) {
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MIR_type_t qword_types[MAX_QWORDS];
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int n_qwords = classify_arg (c2m_ctx, arg_type, qword_types, FALSE);
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assert (arg_type->mode == TM_STRUCT || arg_type->mode == TM_UNION);
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return get_blk_type (n_qwords, qword_types);
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}
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static void target_add_arg_proto (c2m_ctx_t c2m_ctx, const char *name, struct type *arg_type,
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target_arg_info_t *arg_info, VARR (MIR_var_t) * arg_vars) {
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MIR_var_t var;
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MIR_type_t type;
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MIR_type_t qword_types[MAX_QWORDS];
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int n_qwords = process_aggregate_arg (c2m_ctx, arg_type, arg_info, qword_types);
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/* pass aggregates on the stack and pass by value for others: */
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var.name = name;
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if (arg_type->mode != TM_STRUCT && arg_type->mode != TM_UNION) {
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type = get_mir_type (c2m_ctx, arg_type);
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var.type = type;
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if (type == MIR_T_F || type == MIR_T_D)
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arg_info->n_fregs++;
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else if (type != MIR_T_LD)
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arg_info->n_iregs++;
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} else {
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var.type = get_blk_type (n_qwords, qword_types);
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var.size = type_size (c2m_ctx, arg_type);
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}
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VARR_PUSH (MIR_var_t, arg_vars, var);
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}
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static void target_add_call_arg_op (c2m_ctx_t c2m_ctx, struct type *arg_type,
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target_arg_info_t *arg_info, op_t arg) {
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gen_ctx_t gen_ctx = c2m_ctx->gen_ctx;
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MIR_context_t ctx = c2m_ctx->ctx;
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MIR_type_t type;
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MIR_type_t qword_types[MAX_QWORDS];
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int n_qwords = process_aggregate_arg (c2m_ctx, arg_type, arg_info, qword_types);
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/* pass aggregates on the stack and pass by value for others: */
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|
if (arg_type->mode != TM_STRUCT && arg_type->mode != TM_UNION) {
|
|
type = get_mir_type (c2m_ctx, arg_type);
|
|
VARR_PUSH (MIR_op_t, call_ops, arg.mir_op);
|
|
if (type == MIR_T_F || type == MIR_T_D)
|
|
arg_info->n_fregs++;
|
|
else if (type != MIR_T_LD)
|
|
arg_info->n_iregs++;
|
|
} else {
|
|
assert (arg.mir_op.mode == MIR_OP_MEM);
|
|
arg = mem_to_address (c2m_ctx, arg, TRUE);
|
|
type = get_blk_type (n_qwords, qword_types);
|
|
VARR_PUSH (MIR_op_t, call_ops,
|
|
MIR_new_mem_op (ctx, type, type_size (c2m_ctx, arg_type), arg.mir_op.u.reg, 0, 1));
|
|
}
|
|
}
|
|
|
|
static int target_gen_gather_arg (c2m_ctx_t c2m_ctx, const char *name, struct type *arg_type,
|
|
decl_t param_decl, target_arg_info_t *arg_info) {
|
|
return FALSE;
|
|
}
|